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| author | Luc Van Oostenryck <luc.vanoostenryck@gmail.com> | 2018-05-31 17:42:01 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2018-06-11 09:03:43 -0700 |
| commit | 889d746edd02a4498d80df3a12017d484cc78e5c (patch) | |
| tree | 222da2c3cbcd5dd14c4c1a9c15d867dc0abadf9c /arch/riscv | |
| parent | 32c81bced35696e1ffe92170c72fba16edef3023 (diff) | |
| download | op-kernel-dev-889d746edd02a4498d80df3a12017d484cc78e5c.zip op-kernel-dev-889d746edd02a4498d80df3a12017d484cc78e5c.tar.gz | |
riscv: add riscv-specific predefines to CHECKFLAGS
RISC-V uses the macro __riscv_xlen, predefined by GCC, to
make the distinction between 32 or 64 bit code.
However, sparse doesn't know anything about this macro
which lead to wrong warnings and failures.
Fix this by adding a define of __riscv_xlen to CHECKFLAGS
and add one for __riscv too.
Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/Makefile | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 76e958a..6d4a5f6c 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -71,6 +71,9 @@ KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax) # architectures. It's faster to have GCC emit only aligned accesses. KBUILD_CFLAGS += $(call cc-option,-mstrict-align) +# arch specific predefines for sparse +CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS) + head-y := arch/riscv/kernel/head.o core-y += arch/riscv/kernel/ arch/riscv/mm/ |
