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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-30 08:10:12 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-30 08:10:12 -0700
commit24a77daf3d80bddcece044e6dc3675e427eef3f3 (patch)
tree2c5e0b0bea394d6fe62c5d5857c252e83e48ac48 /arch/ppc/platforms/4xx/ocotea.c
parente389f9aec689209724105ae80a6c91fd2e747bc9 (diff)
parentf900e9777fc9b65140cb9570438597bc8fae56ab (diff)
downloadop-kernel-dev-24a77daf3d80bddcece044e6dc3675e427eef3f3.zip
op-kernel-dev-24a77daf3d80bddcece044e6dc3675e427eef3f3.tar.gz
Merge branch 'for-2.6.22' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'for-2.6.22' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (255 commits) [POWERPC] Remove dev_dbg redefinition in drivers/ps3/vuart.c [POWERPC] remove kernel module option for booke wdt [POWERPC] Avoid putting cpu node twice [POWERPC] Spinlock initializer cleanup [POWERPC] ppc4xx_sgdma needs dma-mapping.h [POWERPC] arch/powerpc/sysdev/timer.c build fix [POWERPC] get_property cleanups [POWERPC] Remove the unused HTDMSOUND driver [POWERPC] cell: cbe_cpufreq cleanup and crash fix [POWERPC] Declare enable_kernel_spe in a header [POWERPC] Add dt_xlate_addr() to bootwrapper [POWERPC] bootwrapper: CONFIG_ -> CONFIG_DEVICE_TREE [POWERPC] Don't define a custom bd_t for Xilixn Virtex based boards. [POWERPC] Add sane defaults for Xilinx EDK generated xparameters files [POWERPC] Add uartlite boot console driver for the zImage wrapper [POWERPC] Stop using ppc_sys for Xilinx Virtex boards [POWERPC] New registration for common Xilinx Virtex ppc405 platform devices [POWERPC] Merge common virtex header files [POWERPC] Rework Kconfig dependancies for Xilinx Virtex ppc405 platform [POWERPC] Clean up cpufreq Kconfig dependencies ...
Diffstat (limited to 'arch/ppc/platforms/4xx/ocotea.c')
-rw-r--r--arch/ppc/platforms/4xx/ocotea.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index 84e999d..5e994e1 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -178,7 +178,7 @@ ocotea_setup_pcix(void)
/* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
- PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA);
+ PCIX_WRITEL(0x80000007, PCIX0_PIM0SA);
eieio();
}
@@ -289,7 +289,7 @@ ocotea_setup_arch(void)
* from FPGA, because it can be changed by on-board switches
* --ebs
*/
- ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
+ ibm440gx_get_clocks(&clocks, 33300000, 6 * 1843200);
ocp_sys_info.opb_bus_freq = clocks.opb;
/* Setup TODC access */
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