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authorScott Wood <scottwood@freescale.com>2015-04-06 22:00:38 -0500
committerScott Wood <scottwood@freescale.com>2015-06-02 21:37:19 -0500
commit86d63363defc0b2f22288b287f75837d48b561fc (patch)
tree5b72c19acb159302e65611b3320ac2b6a34b097a /arch/powerpc
parentc89ca8ab7457d891abdffca7e6f5e74cef670d6d (diff)
downloadop-kernel-dev-86d63363defc0b2f22288b287f75837d48b561fc.zip
op-kernel-dev-86d63363defc0b2f22288b287f75837d48b561fc.tar.gz
powerpc/e500mc: Remove dead L2 flushing code in idle_e500.S
This code can never be executed as it is only built when CONFIG_PPC_E500MC is unset, but the only CPUs that have CPU_FTR_L2CSR require CONFIG_PPC_E500MC and do not have the MSR/HID0-based nap mechanism that this file uses. Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kernel/idle_e500.S9
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S
index 1544866..b9b6ef5 100644
--- a/arch/powerpc/kernel/idle_e500.S
+++ b/arch/powerpc/kernel/idle_e500.S
@@ -58,15 +58,6 @@ BEGIN_FTR_SECTION
mtlr r0
lis r3,HID0_NAP@h
END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
-BEGIN_FTR_SECTION
- msync
- li r7,L2CSR0_L2FL@l
- mtspr SPRN_L2CSR0,r7
-2:
- mfspr r7,SPRN_L2CSR0
- andi. r4,r7,L2CSR0_L2FL@l
- bne 2b
-END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)
1:
/* Go to NAP or DOZE now */
mfspr r4,SPRN_HID0
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