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authorTom Huynh <tom.huynh@freescale.com>2015-01-20 16:19:50 -0600
committerScott Wood <scottwood@freescale.com>2015-01-29 20:05:56 -0600
commitd2caa3cebda8b626336e100b80a0ed6f909dccab (patch)
tree1f72536b25f7bcaa9e891a85891f9a060bcdaeb1 /arch/powerpc
parent238cac16c03eef00bcb607e09defee79dadca958 (diff)
downloadop-kernel-dev-d2caa3cebda8b626336e100b80a0ed6f909dccab.zip
op-kernel-dev-d2caa3cebda8b626336e100b80a0ed6f909dccab.tar.gz
powerpc/perf: fix fsl_emb_pmu_start to write correct pmc value
PMCs on PowerPC increases towards 0x80000000 and triggers an overflow interrupt when the msb is set to collect a sample. Therefore, to setup for the next sample collection, pmu_start should set the pmc value to 0x80000000 - left instead of left which incorrectly delays the next overflow interrupt. Same as commit 9a45a9407c69 ("powerpc/perf: power_pmu_start restores incorrect values, breaking frequency events") for book3s. Signed-off-by: Tom Huynh <tom.huynh@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/perf/core-fsl-emb.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c
index 4acaea0..e9fe904 100644
--- a/arch/powerpc/perf/core-fsl-emb.c
+++ b/arch/powerpc/perf/core-fsl-emb.c
@@ -389,6 +389,7 @@ static void fsl_emb_pmu_del(struct perf_event *event, int flags)
static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags)
{
unsigned long flags;
+ unsigned long val;
s64 left;
if (event->hw.idx < 0 || !event->hw.sample_period)
@@ -405,7 +406,10 @@ static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags)
event->hw.state = 0;
left = local64_read(&event->hw.period_left);
- write_pmc(event->hw.idx, left);
+ val = 0;
+ if (left < 0x80000000L)
+ val = 0x80000000L - left;
+ write_pmc(event->hw.idx, val);
perf_event_update_userpage(event);
perf_pmu_enable(event->pmu);
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