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authorTimothy Pearson <tpearson@raptorengineering.com>2018-06-23 16:25:16 -0500
committerTimothy Pearson <tpearson@raptorengineering.com>2018-06-23 16:29:47 -0500
commitb29e05ceb186923224e8a4227444e4aa8cb59d6a (patch)
treea6001849da93589bf518948e2d36573da910f89e /arch/powerpc
parentcba940335dfa3bf93ef6991da2eb2eda145895c8 (diff)
downloadop-kernel-dev-b29e05ceb186923224e8a4227444e4aa8cb59d6a.zip
op-kernel-dev-b29e05ceb186923224e8a4227444e4aa8cb59d6a.tar.gz
powerpc/powernv/pci: Don't use the lower 4G TCEs in pseudo-DMA mode
Four TCEs are reserved for legacy 32-bit DMA mappings in psuedo DMA mode. Mark these with an invalid address to avoid their use by the TCE cache mapper. Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index a6097dd..e8a1333 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1783,7 +1783,7 @@ static bool pnv_pci_ioda_pe_single_vendor(struct pnv_ioda_pe *pe)
static int pnv_pci_pseudo_bypass_setup(struct pnv_ioda_pe *pe)
{
- u64 tce_count, table_size, window_size;
+ u64 i, tce_count, table_size, window_size;
struct pnv_phb *p = pe->phb;
struct page *table_pages;
__be64 *tces;
@@ -1835,6 +1835,12 @@ static int pnv_pci_pseudo_bypass_setup(struct pnv_ioda_pe *pe)
/* mark the first 4GB as reserved so this can still be used for 32bit */
bitmap_set(pe->tce_bitmap, 0, 1ULL << (32 - p->ioda.max_tce_order));
+ /* make sure reserved first 4GB TCEs are not used by the mapper
+ * set each address to -1, which will never match an incoming request
+ */
+ for (i = 0; i < 4; i++)
+ pe->tce_tracker[i * 2] = -1;
+
pe_info(pe, "pseudo-bypass sizes: tracker %d bitmap %d TCEs %lld\n",
tracker_entries, bitmap_size, tce_count);
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