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| author | Simon Guo <wei.guo.simon@gmail.com> | 2018-05-23 15:01:52 +0800 |
|---|---|---|
| committer | Paul Mackerras <paulus@ozlabs.org> | 2018-06-01 10:29:28 +1000 |
| commit | 901938add3bd598bf641672a85e644ac07e77e9a (patch) | |
| tree | 070cdecfbc7ec19bc92be5ca8c735212351fa4a4 /arch/powerpc | |
| parent | 25ddda07b6e55a12065631e20f7f1e198230502f (diff) | |
| download | op-kernel-dev-901938add3bd598bf641672a85e644ac07e77e9a.zip op-kernel-dev-901938add3bd598bf641672a85e644ac07e77e9a.tar.gz | |
KVM: PPC: Book3S PR: Pass through MSR TM and TS bits to shadow_msr
PowerPC TM functionality needs MSR TM/TS bits support in hardware level.
Guest TM functionality can not be emulated with "fake" MSR (msr in magic
page) TS bits.
This patch syncs TM/TS bits in shadow_msr with the MSR value in magic
page, so that the MSR TS value which guest sees is consistent with actual
MSR bits running in guest.
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/kvm/book3s_pr.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index b1aff9f..0a892be 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c @@ -312,7 +312,12 @@ static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) ulong smsr = guest_msr; /* Guest MSR values */ +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM + smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE | + MSR_TM | MSR_TS_MASK; +#else smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE; +#endif /* Process MSR values */ smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; /* External providers the guest reserved */ |
