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| author | Grant Likely <grant.likely@linaro.org> | 2014-03-04 16:44:10 +0800 |
|---|---|---|
| committer | Grant Likely <grant.likely@linaro.org> | 2014-03-04 16:44:10 +0800 |
| commit | dab2310d9d90eded48625c5382c6a60389bf8ca9 (patch) | |
| tree | 9327cc815d69dec23aebf03407e3fa82b6d2fbaa /arch/powerpc/platforms/pseries/pci.c | |
| parent | a3dbeb5b45af5b6113385db89fce2a8279278e8b (diff) | |
| parent | 0414855fdc4a40da05221fc6062cccbc0c30f169 (diff) | |
| download | op-kernel-dev-dab2310d9d90eded48625c5382c6a60389bf8ca9.zip op-kernel-dev-dab2310d9d90eded48625c5382c6a60389bf8ca9.tar.gz | |
Merge tag 'v3.14-rc5' into HEAD
Linux 3.14-rc5
Diffstat (limited to 'arch/powerpc/platforms/pseries/pci.c')
| -rw-r--r-- | arch/powerpc/platforms/pseries/pci.c | 22 |
1 files changed, 15 insertions, 7 deletions
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index 70670a2..c413ec1 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c @@ -113,7 +113,8 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) { struct device_node *dn, *pdn; struct pci_bus *bus; - const __be32 *pcie_link_speed_stats; + u32 pcie_link_speed_stats[2]; + int rc; bus = bridge->bus; @@ -122,38 +123,45 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) return 0; for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { - pcie_link_speed_stats = of_get_property(pdn, - "ibm,pcie-link-speed-stats", NULL); - if (pcie_link_speed_stats) + rc = of_property_read_u32_array(pdn, + "ibm,pcie-link-speed-stats", + &pcie_link_speed_stats[0], 2); + if (!rc) break; } of_node_put(pdn); - if (!pcie_link_speed_stats) { + if (rc) { pr_err("no ibm,pcie-link-speed-stats property\n"); return 0; } - switch (be32_to_cpup(pcie_link_speed_stats)) { + switch (pcie_link_speed_stats[0]) { case 0x01: bus->max_bus_speed = PCIE_SPEED_2_5GT; break; case 0x02: bus->max_bus_speed = PCIE_SPEED_5_0GT; break; + case 0x04: + bus->max_bus_speed = PCIE_SPEED_8_0GT; + break; default: bus->max_bus_speed = PCI_SPEED_UNKNOWN; break; } - switch (be32_to_cpup(pcie_link_speed_stats)) { + switch (pcie_link_speed_stats[1]) { case 0x01: bus->cur_bus_speed = PCIE_SPEED_2_5GT; break; case 0x02: bus->cur_bus_speed = PCIE_SPEED_5_0GT; break; + case 0x04: + bus->cur_bus_speed = PCIE_SPEED_8_0GT; + break; default: bus->cur_bus_speed = PCI_SPEED_UNKNOWN; break; |
