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author | Kumar Gala <galak@kernel.crashing.org> | 2007-07-19 16:07:35 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2007-07-23 22:29:09 -0500 |
commit | 2e56ff206b7c6c28b847ccdbe46ad69b3263ac32 (patch) | |
tree | 636f8d31a2b6c19fe21b12c61f47dcd96d393871 /arch/powerpc/platforms/chrp/pci.c | |
parent | d5269966e57484548bc5d38e117f161bf2f56ce9 (diff) | |
download | op-kernel-dev-2e56ff206b7c6c28b847ccdbe46ad69b3263ac32.zip op-kernel-dev-2e56ff206b7c6c28b847ccdbe46ad69b3263ac32.tar.gz |
[POWERPC] Make endianess of cfg_addr for indirect pci ops runtime
Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian. This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/chrp/pci.c')
-rw-r--r-- | arch/powerpc/platforms/chrp/pci.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c index 3690624..28d1647 100644 --- a/arch/powerpc/platforms/chrp/pci.c +++ b/arch/powerpc/platforms/chrp/pci.c @@ -181,7 +181,7 @@ setup_python(struct pci_controller *hose, struct device_node *dev) } iounmap(reg); - setup_indirect_pci(hose, r.start + 0xf8000, r.start + 0xf8010); + setup_indirect_pci(hose, r.start + 0xf8000, r.start + 0xf8010, 0); } /* Marvell Discovery II based Pegasos 2 */ @@ -277,13 +277,14 @@ chrp_find_bridges(void) hose->cfg_data = p; gg2_pci_config_base = p; } else if (is_pegasos == 1) { - setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc); + setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc, 0); } else if (is_pegasos == 2) { setup_peg2(hose, dev); } else if (!strncmp(model, "IBM,CPC710", 10)) { setup_indirect_pci(hose, r.start + 0x000f8000, - r.start + 0x000f8010); + r.start + 0x000f8010, + 0); if (index == 0) { dma = of_get_property(dev, "system-dma-base", &len); |