diff options
author | Luke Browning <lukebrowning@us.ibm.com> | 2008-06-05 17:30:25 +0800 |
---|---|---|
committer | Jeremy Kerr <jk@ozlabs.org> | 2008-06-16 14:35:00 +1000 |
commit | 1f64643aa5f5a17f1723f7ea0f17b7a3a8f632b3 (patch) | |
tree | fbefce858013d3b53e48b5d3aa1b640025743241 /arch/powerpc/platforms/cell/spu_base.c | |
parent | d84050f48ebba73994b93ccf61cea2364dac8d75 (diff) | |
download | op-kernel-dev-1f64643aa5f5a17f1723f7ea0f17b7a3a8f632b3.zip op-kernel-dev-1f64643aa5f5a17f1723f7ea0f17b7a3a8f632b3.tar.gz |
powerpc/spufs: remove class_0_dsisr from spu exception handling
According to the CBEA, the SPU dsisr is not updated for class 0
exceptions.
spu_stopped() is testing the dsisr that was passed to it from the class
0 exception handler, so we return a false positive here.
This patch cleans up the interrupt handler and erroneous tests in
spu_stopped. It also removes the fields from the csa since it is not
needed to process class 0 events.
Signed-off-by: Luke Browning <lukebrowning@us.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Diffstat (limited to 'arch/powerpc/platforms/cell/spu_base.c')
-rw-r--r-- | arch/powerpc/platforms/cell/spu_base.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 70c6601..96b5f0f 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c @@ -324,14 +324,12 @@ spu_irq_class_0(int irq, void *data) stat = spu_int_stat_get(spu, 0) & mask; spu->class_0_pending |= stat; - spu->class_0_dsisr = spu_mfc_dsisr_get(spu); spu->class_0_dar = spu_mfc_dar_get(spu); spin_unlock(&spu->register_lock); spu->stop_callback(spu, 0); spu->class_0_pending = 0; - spu->class_0_dsisr = 0; spu->class_0_dar = 0; spu_int_stat_clear(spu, 0, stat); |