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| author | Stefan Roese <sr@denx.de> | 2010-02-10 03:54:59 +0000 |
|---|---|---|
| committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2010-02-12 07:54:45 -0500 |
| commit | c7b66698122796623f1838c0ee6a8e12ec832468 (patch) | |
| tree | f4f18204ba82d2d9ec74ba7896b91d823ab3a92c /arch/powerpc/mm | |
| parent | 573bff5ab9437b4e59ba9be34a7b08bca5ff054a (diff) | |
| download | op-kernel-dev-c7b66698122796623f1838c0ee6a8e12ec832468.zip op-kernel-dev-c7b66698122796623f1838c0ee6a8e12ec832468.tar.gz | |
powerpc/40x: Add support for PPC40x boards with > 512MB SDRAM
This patch adds support for boards with more that 512MByte RAM. Currently
only 512MB of memory are enabled in the DCCR/ICCR real-mode cache
control registers. This patch now enables caching in real-mode for
2GByte.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/mm')
| -rw-r--r-- | arch/powerpc/mm/40x_mmu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/mm/40x_mmu.c b/arch/powerpc/mm/40x_mmu.c index 08dfa8e..65abfcf 100644 --- a/arch/powerpc/mm/40x_mmu.c +++ b/arch/powerpc/mm/40x_mmu.c @@ -84,8 +84,8 @@ void __init MMU_init_hw(void) * vectors and the kernel live in real-mode. */ - mtspr(SPRN_DCCR, 0xF0000000); /* 512 MB of data space at 0x0. */ - mtspr(SPRN_ICCR, 0xF0000000); /* 512 MB of instr. space at 0x0. */ + mtspr(SPRN_DCCR, 0xFFFF0000); /* 2GByte of data space at 0x0. */ + mtspr(SPRN_ICCR, 0xFFFF0000); /* 2GByte of instr. space at 0x0. */ } #define LARGE_PAGE_SIZE_16M (1<<24) |
