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| author | Becky Bruce <becky.bruce@freescale.com> | 2008-09-24 11:01:24 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-09-24 16:29:44 -0500 |
| commit | 4ee7084eb11e00eb02dc8435fd18273a61ffa9bf (patch) | |
| tree | f9f147f0293bc33e2962ac1c1aa5bbcbd9c0edce /arch/powerpc/mm/tlb_32.c | |
| parent | 9a62c05180ff55fdaa517370c6f077402820406c (diff) | |
| download | op-kernel-dev-4ee7084eb11e00eb02dc8435fd18273a61ffa9bf.zip op-kernel-dev-4ee7084eb11e00eb02dc8435fd18273a61ffa9bf.tar.gz | |
POWERPC: Allow 32-bit hashed pgtable code to support 36-bit physical
This rearranges a bit of code, and adds support for
36-bit physical addressing for configs that use a
hashed page table. The 36b physical support is not
enabled by default on any config - it must be
explicitly enabled via the config system.
This patch *only* expands the page table code to accomodate
large physical addresses on 32-bit systems and enables the
PHYS_64BIT config option for 86xx. It does *not*
allow you to boot a board with more than about 3.5GB of
RAM - for that, SWIOTLB support is also required (and
coming soon).
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm/tlb_32.c')
| -rw-r--r-- | arch/powerpc/mm/tlb_32.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/mm/tlb_32.c b/arch/powerpc/mm/tlb_32.c index eb4b512..f9a47fe 100644 --- a/arch/powerpc/mm/tlb_32.c +++ b/arch/powerpc/mm/tlb_32.c @@ -45,6 +45,7 @@ void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr) flush_hash_pages(mm->context.id, addr, ptephys, 1); } } +EXPORT_SYMBOL(flush_hash_entry); /* * Called by ptep_set_access_flags, must flush on CPUs for which the |
