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authorStephen Rothwell <sfr@canb.auug.org.au>2006-09-25 18:19:00 +1000
committerStephen Rothwell <sfr@canb.auug.org.au>2006-10-03 16:50:21 +1000
commit3f639ee8c52c187d8c95db430ac6f485bffbe5af (patch)
tree26299497413aba786f962960c4a3cf83aa81f42b /arch/powerpc/mm/slb_low.S
parentfc246c389db7b08b4a054e68c742c6598b02523c (diff)
downloadop-kernel-dev-3f639ee8c52c187d8c95db430ac6f485bffbe5af.zip
op-kernel-dev-3f639ee8c52c187d8c95db430ac6f485bffbe5af.tar.gz
[POWERPC] implement BEGIN/END_FW_FTR_SECTION
and use it an all the obvious places in assembler code. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/powerpc/mm/slb_low.S')
-rw-r--r--arch/powerpc/mm/slb_low.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index dbc1abbd..b10e470 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -21,6 +21,7 @@
#include <asm/page.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
+#include <asm/firmware.h>
/* void slb_allocate_realmode(unsigned long ea);
*
@@ -183,6 +184,7 @@ slb_finish_load:
* dont have any LRU information to help us choose a slot.
*/
#ifdef CONFIG_PPC_ISERIES
+BEGIN_FW_FTR_SECTION
/*
* On iSeries, the "bolted" stack segment can be cast out on
* shared processor switch so we need to check for a miss on
@@ -194,6 +196,7 @@ slb_finish_load:
li r10,SLB_NUM_BOLTED-1 /* Stack goes in last bolted slot */
cmpld r9,r3
beq 3f
+END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#endif /* CONFIG_PPC_ISERIES */
ld r10,PACASTABRR(r13)
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