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authorRussell Currey <ruscur@russell.cc>2017-06-21 17:18:04 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2017-06-27 12:14:28 +1000
commit8e3f1b1d8255105f31556aacf8aeb6071b00d469 (patch)
treed400464cb3a01696baf34674ad5ee125e6d5d44f /arch/powerpc/mm/mmu_context_book3s64.c
parenta0f98629f19943fb8387a7d5fd01e60178223c00 (diff)
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powerpc/powernv/pci: Enable 64-bit devices to access >4GB DMA space
On PHB3/POWER8 systems, devices can select between two different sections of address space, TVE#0 and TVE#1. TVE#0 is intended for 32bit devices that aren't capable of addressing more than 4GB. Selecting TVE#1 instead, with the capability of addressing over 4GB, is performed by setting bit 59 of a PCI address. However, some devices aren't capable of addressing at least 59 bits, but still want more than 4GB of DMA space. In order to enable this, reconfigure TVE#0 to be suitable for 64-bit devices by allocating memory past the initial 4GB that is inaccessible by 64-bit DMAs. This bypass mode is only enabled if a device requests 4GB or more of DMA address space, if the system has PHB3 (POWER8 systems), and if the device does not share a PE with any devices from different vendors. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/mm/mmu_context_book3s64.c')
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