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| author | Shan Hai <shan.hai@windriver.com> | 2010-11-17 10:28:53 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-03-15 13:48:15 -0500 |
| commit | afc0a07d4a283599ac3a6a31d7454e9baaeccca0 (patch) | |
| tree | 0cc07560a34c697f1f67841ee637170f4e38e416 /arch/powerpc/math-emu | |
| parent | cf773702b912544fdb8573c5f4299513d66bb0bf (diff) | |
| download | op-kernel-dev-afc0a07d4a283599ac3a6a31d7454e9baaeccca0.zip op-kernel-dev-afc0a07d4a283599ac3a6a31d7454e9baaeccca0.tar.gz | |
powerpc/85xx: Fix SPE float to integer conversion failure
Conversion from float to integer should based on both the instruction
encoding and the sign of the operand.
A simple testcase to show the issue:
static float fm;
static signed int si_min = (-2147483647 - 1);
static unsigned int ui;
int main()
{
fm = (float) si_min; ;
ui = (unsigned int)fm;
printf("ui=%d, should be %d\n", ui, si_min);
return 0;
}
Result: ui=-1, should be -2147483648
Signed-off-by: Shan Hai <shan.hai@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/math-emu')
| -rw-r--r-- | arch/powerpc/math-emu/math_efp.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/powerpc/math-emu/math_efp.c b/arch/powerpc/math-emu/math_efp.c index 634830b..6227920 100644 --- a/arch/powerpc/math-emu/math_efp.c +++ b/arch/powerpc/math-emu/math_efp.c @@ -322,7 +322,8 @@ int do_spe_mathemu(struct pt_regs *regs) } else { _FP_ROUND_ZERO(1, SB); } - FP_TO_INT_S(vc.wp[1], SB, 32, ((func & 0x3) != 0)); + FP_TO_INT_S(vc.wp[1], SB, 32, + (((func & 0x3) != 0) || SB_s)); goto update_regs; default: @@ -460,7 +461,8 @@ cmp_s: } else { _FP_ROUND_ZERO(2, DB); } - FP_TO_INT_D(vc.wp[1], DB, 32, ((func & 0x3) != 0)); + FP_TO_INT_D(vc.wp[1], DB, 32, + (((func & 0x3) != 0) || DB_s)); goto update_regs; default: @@ -591,8 +593,10 @@ cmp_d: _FP_ROUND_ZERO(1, SB0); _FP_ROUND_ZERO(1, SB1); } - FP_TO_INT_S(vc.wp[0], SB0, 32, ((func & 0x3) != 0)); - FP_TO_INT_S(vc.wp[1], SB1, 32, ((func & 0x3) != 0)); + FP_TO_INT_S(vc.wp[0], SB0, 32, + (((func & 0x3) != 0) || SB0_s)); + FP_TO_INT_S(vc.wp[1], SB1, 32, + (((func & 0x3) != 0) || SB1_s)); goto update_regs; default: |
