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| author | Scott Wood <scottwood@freescale.com> | 2011-11-17 12:39:59 +0000 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2012-03-05 14:52:27 +0200 |
| commit | dfd4d47e9a71c5a35eb67a44cd311efbe1846b7e (patch) | |
| tree | 1115128a884dabf7d853466b82c553561e4f7b27 /arch/powerpc/kvm/booke.h | |
| parent | b59049720dd95021dfe0d9f4e1fa9458a67cfe29 (diff) | |
| download | op-kernel-dev-dfd4d47e9a71c5a35eb67a44cd311efbe1846b7e.zip op-kernel-dev-dfd4d47e9a71c5a35eb67a44cd311efbe1846b7e.tar.gz | |
KVM: PPC: booke: Improve timer register emulation
Decrementers are now properly driven by TCR/TSR, and the guest
has full read/write access to these registers.
The decrementer keeps ticking (and setting the TSR bit) regardless of
whether the interrupts are enabled with TCR.
The decrementer stops at zero, rather than going negative.
Decrementers (and FITs, once implemented) are delivered as
level-triggered interrupts -- dequeued when the TSR bit is cleared, not
on delivery.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
[scottwood@freescale.com: significant changes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc/kvm/booke.h')
| -rw-r--r-- | arch/powerpc/kvm/booke.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h index 8e1fe33..2fe2027 100644 --- a/arch/powerpc/kvm/booke.h +++ b/arch/powerpc/kvm/booke.h @@ -55,6 +55,10 @@ extern unsigned long kvmppc_booke_handlers; void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr); void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr); +void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr); +void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits); +void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits); + int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, unsigned int inst, int *advance); int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt); |
