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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2017-02-07 16:03:17 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2017-02-07 16:40:18 +1100
commitab9bad0ead9ab179ace09988a3f1cfca122eb7c2 (patch)
treec66b5330f182f5110969c05ffad9371a9991e360 /arch/powerpc/kernel
parent2337d207288f163e10bd8d4d7eeb0c1c75046a0c (diff)
downloadop-kernel-dev-ab9bad0ead9ab179ace09988a3f1cfca122eb7c2.zip
op-kernel-dev-ab9bad0ead9ab179ace09988a3f1cfca122eb7c2.tar.gz
powerpc/powernv: Remove separate entry for OPAL real mode calls
All entry points already read the MSR so they can easily do the right thing. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/idle_book3s.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index 72dac0b..5302e1a 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -250,7 +250,7 @@ fastsleep_workaround_at_entry:
/* Fast sleep workaround */
li r3,1
li r4,1
- bl opal_rm_config_cpu_idle_state
+ bl opal_config_cpu_idle_state
/* Clear Lock bit */
li r0,0
@@ -544,7 +544,7 @@ timebase_resync:
*/
ble cr3,clear_lock
/* Time base re-sync */
- bl opal_rm_resync_timebase;
+ bl opal_resync_timebase;
/*
* If waking up from sleep, per core state is not lost, skip to
* clear_lock.
@@ -633,7 +633,7 @@ hypervisor_state_restored:
fastsleep_workaround_at_exit:
li r3,1
li r4,0
- bl opal_rm_config_cpu_idle_state
+ bl opal_config_cpu_idle_state
b timebase_resync
/*
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