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authorMichael Ellerman <michael@ellerman.id.au>2013-04-30 20:17:02 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-05-02 10:35:16 +1000
commit1de2bd4e0c0f62c697a3b3e19bda431cf67ce20e (patch)
treed8effab6a598d459f4828c81643f13637dbb9ecc /arch/powerpc/kernel
parent53b56ca0195b8a2a098a358088ecfefafb030b40 (diff)
downloadop-kernel-dev-1de2bd4e0c0f62c697a3b3e19bda431cf67ce20e.zip
op-kernel-dev-1de2bd4e0c0f62c697a3b3e19bda431cf67ce20e.tar.gz
powerpc: Replace CPU_FTR_BCTAR with CPU_FTR_ARCH_207S
We are getting low on cpu feature bits. So rather than add a separate bit for every new Power8 feature, add a bit for arch 2.07 server catagory and use that instead. Hijack the value we had for BCTAR, but swap the value with CFAR so that all the ARCH defines are together. Note we don't touch CPU_FTR_TM, because it is conditionally enabled if the kernel is built with TM support. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/entry_64.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 04d69c4..7a6801f 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -458,7 +458,7 @@ BEGIN_FTR_SECTION
*/
mfspr r0,SPRN_TAR
std r0,THREAD_TAR(r3)
-END_FTR_SECTION_IFSET(CPU_FTR_BCTAR)
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
#endif
#ifdef CONFIG_SMP
@@ -547,7 +547,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
BEGIN_FTR_SECTION
ld r0,THREAD_TAR(r4)
mtspr SPRN_TAR,r0
-END_FTR_SECTION_IFSET(CPU_FTR_BCTAR)
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
#endif
#ifdef CONFIG_ALTIVEC
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