diff options
author | Tony Breeds <tony@bakeyournoodle.com> | 2011-11-30 21:39:23 +0000 |
---|---|---|
committer | Josh Boyer <jwboyer@gmail.com> | 2011-12-09 07:51:02 -0500 |
commit | df777bd39a266637d1765d48043493489418e75b (patch) | |
tree | edd0b29da39bb9bd4266bd026cd4510041cb03b5 /arch/powerpc/kernel | |
parent | 075bcf5879225d0c2a119c23d8046b890e051e81 (diff) | |
download | op-kernel-dev-df777bd39a266637d1765d48043493489418e75b.zip op-kernel-dev-df777bd39a266637d1765d48043493489418e75b.tar.gz |
powerpc/476fpe: Add 476fpe SoC code
Based on original work by David 'Shaggy' Kleikamp.
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 14 | ||||
-rw-r--r-- | arch/powerpc/kernel/head_44x.S | 2 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index ce59693..81db9e2 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -1843,6 +1843,20 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_47x, .platform = "ppc470", }, + { /* 476fpe */ + .pvr_mask = 0xffff0000, + .pvr_value = 0x7ff50000, + .cpu_name = "476fpe", + .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, + .cpu_user_features = COMMON_USER_BOOKE | + PPC_FEATURE_HAS_FPU, + .mmu_features = MMU_FTR_TYPE_47x | + MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, + .icache_bsize = 32, + .dcache_bsize = 128, + .machine_check = machine_check_47x, + .platform = "ppc470", + }, { /* 476 iss */ .pvr_mask = 0xffff0000, .pvr_value = 0x00050000, diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index b725dab..bb7a9c7 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S @@ -732,6 +732,8 @@ _GLOBAL(init_cpu_state) /* We use the PVR to differenciate 44x cores from 476 */ mfspr r3,SPRN_PVR srwi r3,r3,16 + cmplwi cr0,r3,PVR_476FPE@h + beq head_start_47x cmplwi cr0,r3,PVR_476@h beq head_start_47x cmplwi cr0,r3,PVR_476_ISS@h |