diff options
| author | Roland McGrath <roland@redhat.com> | 2009-05-28 21:26:38 +0000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-06-09 13:29:25 +1000 |
| commit | ec097c84dff17511f2693e6ef6c3064dfbf0a3af (patch) | |
| tree | 3eac516a13730dcb371c094c0e8d35c9768c9c23 /arch/powerpc/kernel/head_booke.h | |
| parent | dac4ccfb64bcdd5b4c248ccc22903d67486573cd (diff) | |
| download | op-kernel-dev-ec097c84dff17511f2693e6ef6c3064dfbf0a3af.zip op-kernel-dev-ec097c84dff17511f2693e6ef6c3064dfbf0a3af.tar.gz | |
powerpc: Add PTRACE_SINGLEBLOCK support
Reworked by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This adds block-step support on powerpc, including a PTRACE_SINGLEBLOCK
request for ptrace.
The BookE implementation is tweaked to fire a single step after a
block step in order to mimmic the server behaviour.
Signed-off-by: Roland McGrath <roland@redhat.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/head_booke.h')
| -rw-r--r-- | arch/powerpc/kernel/head_booke.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index 95f39f1..5f9febc 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h @@ -256,7 +256,7 @@ label: * off DE in the DSRR1 value and clearing the debug status. \ */ \ mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ - andis. r10,r10,DBSR_IC@h; \ + andis. r10,r10,(DBSR_IC|DBSR_BT)@h; \ beq+ 2f; \ \ lis r10,KERNELBASE@h; /* check if exception in vectors */ \ @@ -271,7 +271,7 @@ label: \ /* here it looks like we got an inappropriate debug exception. */ \ 1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CDRR1 value */ \ - lis r10,DBSR_IC@h; /* clear the IC event */ \ + lis r10,(DBSR_IC|DBSR_BT)@h; /* clear the IC event */ \ mtspr SPRN_DBSR,r10; \ /* restore state and get out */ \ lwz r10,_CCR(r11); \ @@ -309,7 +309,7 @@ label: * off DE in the CSRR1 value and clearing the debug status. \ */ \ mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ - andis. r10,r10,DBSR_IC@h; \ + andis. r10,r10,(DBSR_IC|DBSR_BT)@h; \ beq+ 2f; \ \ lis r10,KERNELBASE@h; /* check if exception in vectors */ \ @@ -317,14 +317,14 @@ label: cmplw r12,r10; \ blt+ 2f; /* addr below exception vectors */ \ \ - lis r10,DebugCrit@h; \ + lis r10,DebugCrit@h; \ ori r10,r10,DebugCrit@l; \ cmplw r12,r10; \ bgt+ 2f; /* addr above exception vectors */ \ \ /* here it looks like we got an inappropriate debug exception. */ \ 1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CSRR1 value */ \ - lis r10,DBSR_IC@h; /* clear the IC event */ \ + lis r10,(DBSR_IC|DBSR_BT)@h; /* clear the IC event */ \ mtspr SPRN_DBSR,r10; \ /* restore state and get out */ \ lwz r10,_CCR(r11); \ |
