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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-22 12:48:03 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-22 12:48:03 -0700
commit14d1adfc59ba66932ef167fdff62983e7c2b0197 (patch)
tree34bad21bf4ec220be87fa5d79ff41dd98e7dad9f /arch/powerpc/kernel/entry_64.S
parente478bec0ba0a83a48a0f6982934b6de079e7e6b3 (diff)
parent69917c26c840e7de94522bf90fb190de63bf92bd (diff)
downloadop-kernel-dev-14d1adfc59ba66932ef167fdff62983e7c2b0197.zip
op-kernel-dev-14d1adfc59ba66932ef167fdff62983e7c2b0197.tar.gz
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (114 commits) [POWERPC] Fix ohare IDE irq workaround on old powermacs [POWERPC] EEH: Power4 systems sometimes need multiple resets. [POWERPC] Include <asm/mmu.h> in arch/powerpc/sysdev/fsl_soc.h for phys_addr_t. [POWERPC] Demacrofy arch/powerpc/platforms/maple/pci.c [POWERPC] Maple U3 HT - reject inappropriate config space access [POWERPC] Fix IPIC pending register assignments [POWERPC] powerpc: fix building gdb against asm/ptrace.h [POWERPC] Remove DISCONTIGMEM cruft from page.h [POWERPC] Merge iSeries i/o operations with the rest [POWERPC] 40x: Fix debug status register defines [POWERPC] Fix compile error in sbc8560 [POWERPC] EEH: support MMIO enable recovery step [POWERPC] EEH: enable MMIO/DMA on frozen slot [POWERPC] EEH: code comment cleanup [POWERPC] EEH: balance pcidev_get/put calls [POWERPC] PPC: Fix xmon stack frame address in backtrace [POWERPC] Add AT_PLATFORM value for Xilinx Virtex-4 FX [POWERPC] Start arch/powerpc/boot code reorganization [POWERPC] Define of_read_ulong helper [POWERPC] iseries: eliminate a couple of warnings ...
Diffstat (limited to 'arch/powerpc/kernel/entry_64.S')
-rw-r--r--arch/powerpc/kernel/entry_64.S8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 54d9f5c..2cd872b 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -375,6 +375,14 @@ BEGIN_FTR_SECTION
ld r7,KSP_VSID(r4) /* Get new stack's VSID */
oris r0,r6,(SLB_ESID_V)@h
ori r0,r0,(SLB_NUM_BOLTED-1)@l
+
+ /* Update the last bolted SLB */
+ ld r9,PACA_SLBSHADOWPTR(r13)
+ li r12,0
+ std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
+ std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */
+ std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */
+
slbie r6
slbie r6 /* Workaround POWER5 < DD2.1 issue */
slbmte r7,r0
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