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author | Wei Yang <weiyang@linux.vnet.ibm.com> | 2016-03-04 10:53:09 +1100 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-03-09 09:58:21 +1100 |
commit | 9312bc5bab5907937db20c9f8c094d0c02dd78db (patch) | |
tree | bfebde4012f3880c88430e364f152bc0d705233f /arch/powerpc/include | |
parent | c29fa27d26e3189009ba42786f0c0dce14a90940 (diff) | |
download | op-kernel-dev-9312bc5bab5907937db20c9f8c094d0c02dd78db.zip op-kernel-dev-9312bc5bab5907937db20c9f8c094d0c02dd78db.tar.gz |
powerpc/powernv: Support EEH reset for VF PE
PEs for VFs don't have primary bus. So they have to have their own reset
backend, which is used during EEH recovery. The patch implements the reset
backend for VF's PE by issuing FLR or AF FLR to the VFs, which are contained
in the PE.
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/eeh.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h index 0c551a2..b5b5f45 100644 --- a/arch/powerpc/include/asm/eeh.h +++ b/arch/powerpc/include/asm/eeh.h @@ -137,6 +137,7 @@ struct eeh_dev { int pcix_cap; /* Saved PCIx capability */ int pcie_cap; /* Saved PCIe capability */ int aer_cap; /* Saved AER capability */ + int af_cap; /* Saved AF capability */ struct eeh_pe *pe; /* Associated PE */ struct list_head list; /* Form link list in the PE */ struct pci_controller *phb; /* Associated PHB */ |