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| author | Kumar Gala <galak@kernel.crashing.org> | 2009-09-01 15:48:42 +0000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-09-02 16:20:41 +1000 |
| commit | 76acc2c1a7a9a8c2cae7e9cf8d0a8b374a48aa94 (patch) | |
| tree | 3d65ea23c18d4a73ce55724de66ae9eb7eb2358d /arch/powerpc/include/asm/pte-fsl-booke.h | |
| parent | 1d5d9527d8ed8d87beb22a4fd954366aeabd12c7 (diff) | |
| download | op-kernel-dev-76acc2c1a7a9a8c2cae7e9cf8d0a8b374a48aa94.zip op-kernel-dev-76acc2c1a7a9a8c2cae7e9cf8d0a8b374a48aa94.tar.gz | |
powerpc/fsl-booke: Use HW PTE format if CONFIG_PTE_64BIT
Switch to using the Power ISA defined PTE format when we have a 64-bit
PTE. This makes the code handling between fsl-booke and book3e-64
similiar for TLB faults.
Additionally this lets use take advantage of the page size encodings and
full permissions that the HW PTE defines.
Also defined _PMD_PRESENT, _PMD_PRESENT_MASK, and _PMD_BAD since the
32-bit ppc arch code expects them.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/pte-fsl-booke.h')
| -rw-r--r-- | arch/powerpc/include/asm/pte-fsl-booke.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/powerpc/include/asm/pte-fsl-booke.h b/arch/powerpc/include/asm/pte-fsl-booke.h index ce8a9e9..2c12be5 100644 --- a/arch/powerpc/include/asm/pte-fsl-booke.h +++ b/arch/powerpc/include/asm/pte-fsl-booke.h @@ -33,13 +33,6 @@ #define _PAGE_WRITETHRU 0x00400 /* H: W bit */ #define _PAGE_SPECIAL 0x00800 /* S: Special page */ -#ifdef CONFIG_PTE_64BIT -/* ERPN in a PTE never gets cleared, ignore it */ -#define _PTE_NONE_MASK 0xffffffffffff0000ULL -/* We extend the size of the PTE flags area when using 64-bit PTEs */ -#define PTE_RPN_SHIFT (PAGE_SHIFT + 8) -#endif - #define _PMD_PRESENT 0 #define _PMD_PRESENT_MASK (PAGE_MASK) #define _PMD_BAD (~PAGE_MASK) |
