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| author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2018-03-26 15:34:49 +0530 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-03-31 00:10:38 +1100 |
| commit | c2b4d8b7417a59b7f9a52d0d8402f5257cbbd398 (patch) | |
| tree | 1494c8180465b2cfe2df7e97e7ee668f5974a4a6 /arch/powerpc/include/asm/processor.h | |
| parent | f384796c40dc55b3dba25e0ee9c1afd98c6d24d1 (diff) | |
| download | op-kernel-dev-c2b4d8b7417a59b7f9a52d0d8402f5257cbbd398.zip op-kernel-dev-c2b4d8b7417a59b7f9a52d0d8402f5257cbbd398.tar.gz | |
powerpc/mm/hash64: Increase the VA range
This patch increases the max virtual (effective) address value to 4PB.
With 4K page size config we continue to limit ourself to 64TB.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
[mpe: Keep the H_PGTABLE_RANGE test, update it to work]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/processor.h')
| -rw-r--r-- | arch/powerpc/include/asm/processor.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 75b0844..bb9cb25 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -109,6 +109,13 @@ void release_thread(struct task_struct *); #define TASK_SIZE_64TB (0x0000400000000000UL) #define TASK_SIZE_128TB (0x0000800000000000UL) #define TASK_SIZE_512TB (0x0002000000000000UL) +#define TASK_SIZE_1PB (0x0004000000000000UL) +#define TASK_SIZE_2PB (0x0008000000000000UL) +/* + * With 52 bits in the address we can support + * upto 4PB of range. + */ +#define TASK_SIZE_4PB (0x0010000000000000UL) /* * For now 512TB is only supported with book3s and 64K linux page size. @@ -117,7 +124,7 @@ void release_thread(struct task_struct *); /* * Max value currently used: */ -#define TASK_SIZE_USER64 TASK_SIZE_512TB +#define TASK_SIZE_USER64 TASK_SIZE_4PB #define DEFAULT_MAP_WINDOW_USER64 TASK_SIZE_128TB #define TASK_CONTEXT_SIZE TASK_SIZE_512TB #else |
