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authorGavin Shan <gwshan@linux.vnet.ibm.com>2014-04-24 18:00:12 +1000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-04-28 17:34:02 +1000
commitd0914f503f7ba2cd078b123983562be8951296d3 (patch)
tree1b8ddd75171e8ff07f8e52208906fd7a825170e8 /arch/powerpc/include/asm/eeh.h
parent7b401850a1c9b64b010b3d107321df4e7d066995 (diff)
downloadop-kernel-dev-d0914f503f7ba2cd078b123983562be8951296d3.zip
op-kernel-dev-d0914f503f7ba2cd078b123983562be8951296d3.tar.gz
powerpc/eeh: Block PCI-CFG access during PE reset
We've observed multiple PE reset failures because of PCI-CFG access during that period. Potentially, some device drivers can't support EEH very well and they can't put the device to motionless state before PE reset. So those device drivers might produce PCI-CFG accesses during PE reset. Also, we could have PCI-CFG access from user space (e.g. "lspci"). Since access to frozen PE should return 0xFF's, we can block PCI-CFG access during the period of PE reset so that we won't get recrusive EEH errors. The patch adds flag EEH_PE_RESET, which is kept during PE reset. The PowerNV/pSeries PCI-CFG accessors reuse the flag to block PCI-CFG accordingly. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/eeh.h')
-rw-r--r--arch/powerpc/include/asm/eeh.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index a61b06f..fa32d8d 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -53,6 +53,7 @@ struct device_node;
#define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
+#define EEH_PE_RESET (1 << 2) /* PE reset in progress */
#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
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