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| author | Paul Mackerras <paulus@ozlabs.org> | 2017-08-30 14:12:40 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-09-01 16:42:43 +1000 |
| commit | 31bfdb036f1281831db2532178f0da41f4dc9bed (patch) | |
| tree | 5935c607203c770ec8d8a16811f528cdacdf9dfd /arch/powerpc/Kconfig | |
| parent | a53d5182e24c22986ad0e99e52f8fe343ee7d7ac (diff) | |
| download | op-kernel-dev-31bfdb036f1281831db2532178f0da41f4dc9bed.zip op-kernel-dev-31bfdb036f1281831db2532178f0da41f4dc9bed.tar.gz | |
powerpc: Use instruction emulation infrastructure to handle alignment faults
This replaces almost all of the instruction emulation code in
fix_alignment() with calls to analyse_instr(), emulate_loadstore()
and emulate_dcbz(). The only emulation code left is the SPE
emulation code; analyse_instr() etc. do not handle SPE instructions
at present.
One result of this is that we can now handle alignment faults on
all the new VSX load and store instructions that were added in POWER9.
VSX loads/stores will take alignment faults for unaligned accesses
to cache-inhibited memory.
Another effect is that we no longer rely on the DAR and DSISR values
set by the processor.
With this, we now need to include the instruction emulation code
unconditionally.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/Kconfig')
| -rw-r--r-- | arch/powerpc/Kconfig | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index bf6abab..9fc3c0b 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -367,10 +367,6 @@ config PPC_ADV_DEBUG_DAC_RANGE depends on PPC_ADV_DEBUG_REGS && 44x default y -config PPC_EMULATE_SSTEP - bool - default y if KPROBES || UPROBES || XMON || HAVE_HW_BREAKPOINT - config ZONE_DMA32 bool default y if PPC64 |
