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authorHelge Deller <deller@gmx.de>2009-04-30 21:39:45 +0000
committerKyle McMartin <kyle@mcmartin.ca>2009-07-03 03:34:07 +0000
commit7d17e2763129ea307702fcdc91f6e9d114b65c2d (patch)
tree7941bcdc08cce96bbd31b718a23d1c9431dde2b1 /arch/parisc
parent4fb11781a044552dded5342e1a78cf92a74683db (diff)
downloadop-kernel-dev-7d17e2763129ea307702fcdc91f6e9d114b65c2d.zip
op-kernel-dev-7d17e2763129ea307702fcdc91f6e9d114b65c2d.tar.gz
parisc: fix ldcw inline assembler
There are two reasons to expose the memory *a in the asm: 1) To prevent the compiler from discarding a preceeding write to *a, and 2) to prevent it from caching *a in a register over the asm. The change has had a few days testing with a SMP build of 2.6.22.19 running on a rp3440. This patch is about the correctness of the __ldcw() macro itself. The use of the macro should be confined to small inline functions to try to limit the effect of clobbering memory on GCC's optimization of loads and stores. Signed-off-by: Dave Anglin <dave.anglin@nrc-cnrc.gc.ca> Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/include/asm/system.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
index ee80c92..d91357b 100644
--- a/arch/parisc/include/asm/system.h
+++ b/arch/parisc/include/asm/system.h
@@ -168,8 +168,8 @@ static inline void set_eiem(unsigned long val)
/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
#define __ldcw(a) ({ \
unsigned __ret; \
- __asm__ __volatile__(__LDCW " 0(%1),%0" \
- : "=r" (__ret) : "r" (a)); \
+ __asm__ __volatile__(__LDCW " 0(%2),%0" \
+ : "=r" (__ret), "+m" (*(a)) : "r" (a)); \
__ret; \
})
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