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author | Chris Metcalf <cmetcalf@ezchip.com> | 2015-07-09 16:38:17 -0400 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2015-07-27 14:06:24 +0200 |
commit | 2957c035395e492463d7f589af9dd32388967bbb (patch) | |
tree | 012c7882af09f225a45bc0a2d71bb61620cc5303 /arch/mn10300 | |
parent | 73ada3700bbb0a4c7cc06ea8d74e93c689f90cdb (diff) | |
download | op-kernel-dev-2957c035395e492463d7f589af9dd32388967bbb.zip op-kernel-dev-2957c035395e492463d7f589af9dd32388967bbb.tar.gz |
tile: Provide atomic_{or,xor,and}
Implement atomic logic ops -- atomic_{or,xor,and}.
For tilegx, these are relatively straightforward; the architecture
provides atomic "or" and "and", both 32-bit and 64-bit. To support
xor we provide a loop using "cmpexch".
For the older 32-bit tilepro architecture, we have to extend
the set of low-level assembly routines to include 32-bit "and",
as well as all three 64-bit routines. Somewhat confusingly,
some 32-bit versions are already used by the bitops inlines, with
parameter types appropriate for bitops, so we have to do a bit of
casting to match "int" to "unsigned long".
Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1436474297-32187-1-git-send-email-cmetcalf@ezchip.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mn10300')
0 files changed, 0 insertions, 0 deletions