diff options
| author | David Daney <david.daney@cavium.com> | 2014-05-28 23:52:10 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-05-30 21:01:11 +0200 |
| commit | 45b585c8dcdc469bb40b58cc2801acd7a2332525 (patch) | |
| tree | 7aa6acb2c1085b8074cc30cee2c71d0c5335f94b /arch/mips | |
| parent | 18a8cd63c0d800bbc8b91f03054fcb13d308f6ec (diff) | |
| download | op-kernel-dev-45b585c8dcdc469bb40b58cc2801acd7a2332525.zip op-kernel-dev-45b585c8dcdc469bb40b58cc2801acd7a2332525.tar.gz | |
MIPS: Add function get_ebase_cpunum
This returns the CPUNum from the low order Ebase bits.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7012/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 9 | ||||
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 2 |
2 files changed, 10 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index fb2d174..98e9754 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1792,6 +1792,15 @@ __BUILD_SET_C0(brcm_cmt_ctrl) __BUILD_SET_C0(brcm_config) __BUILD_SET_C0(brcm_mode) +/* + * Return low 10 bits of ebase. + * Note that under KVM (MIPSVZ) this returns vcpu id. + */ +static inline unsigned int get_ebase_cpunum(void) +{ + return read_c0_ebase() & 0x3ff; +} + #endif /* !__ASSEMBLY__ */ #endif /* _ASM_MIPSREGS_H */ diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index b1b580d..d74f957 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -423,7 +423,7 @@ static void decode_configs(struct cpuinfo_mips *c) #ifndef CONFIG_MIPS_CPS if (cpu_has_mips_r2) { - c->core = read_c0_ebase() & 0x3ff; + c->core = get_ebase_cpunum(); if (cpu_has_mipsmt) c->core >>= fls(core_nvpes()) - 1; } |
