summaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
authorWu Zhangjin <wuzhangjin@gmail.com>2009-10-16 14:17:16 +0800
committerRalf Baechle <ralf@linux-mips.org>2009-12-17 01:57:03 +0000
commitdb54ff246eae5acb6b7dffec2c05e682f91e0f4e (patch)
tree26a8aca93bbdcf68ea57e6c84ec5bf2ce4a1ead1 /arch/mips
parentf6d4ff02c60e18797279270d09791768e43cd269 (diff)
downloadop-kernel-dev-db54ff246eae5acb6b7dffec2c05e682f91e0f4e.zip
op-kernel-dev-db54ff246eae5acb6b7dffec2c05e682f91e0f4e.tar.gz
MIPS: Loongson early_printk: Fix variable type of uart_base
The uart_base variable here is not a physical address, so, we replace it by unsigned char *. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Zhang Le <r0bertz@gentoo.org> Cc: zhangfx@lemote.com Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/loongson/common/early_printk.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/loongson/common/early_printk.c b/arch/mips/loongson/common/early_printk.c
index bc73edc..8ec4fb2 100644
--- a/arch/mips/loongson/common/early_printk.c
+++ b/arch/mips/loongson/common/early_printk.c
@@ -1,7 +1,7 @@
/* early printk support
*
* Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
- * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Copyright (c) 2009 Lemote Inc.
* Author: Wu Zhangjin, wuzj@lemote.com
*
* This program is free software; you can redistribute it and/or modify it
@@ -16,20 +16,20 @@
#define PORT(base, offset) (u8 *)(base + offset)
-static inline unsigned int serial_in(phys_addr_t base, int offset)
+static inline unsigned int serial_in(unsigned char *base, int offset)
{
return readb(PORT(base, offset));
}
-static inline void serial_out(phys_addr_t base, int offset, int value)
+static inline void serial_out(unsigned char *base, int offset, int value)
{
writeb(value, PORT(base, offset));
}
void prom_putchar(char c)
{
- phys_addr_t uart_base =
- (phys_addr_t) ioremap_nocache(LOONGSON_UART_BASE, 8);
+ unsigned char *uart_base =
+ (unsigned char *) ioremap_nocache(LOONGSON_UART_BASE, 8);
while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0)
;
OpenPOWER on IntegriCloud