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authorJayachandran C <jchandra@broadcom.com>2012-10-31 12:01:35 +0000
committerJohn Crispin <blogic@openwrt.org>2012-11-09 11:37:19 +0100
commitfeddaf7d89d554b705e7eb14a9202c4946e57c8e (patch)
tree8f0ac095229b404f7503f5b916f922a1fe21be3c /arch/mips
parent862e509b7e31198578449ce356e14a37bd8a6ac7 (diff)
downloadop-kernel-dev-feddaf7d89d554b705e7eb14a9202c4946e57c8e.zip
op-kernel-dev-feddaf7d89d554b705e7eb14a9202c4946e57c8e.tar.gz
MIPS: Netlogic: Pass cpuid to early_init_secondary
The cpuid was not passed into early_init_secondary even though the comment indicated that it will be. Fix this. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4458 Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/netlogic/common/smp.c2
-rw-r--r--arch/mips/netlogic/common/smpboot.S4
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index fab316d..cd39f54 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -98,7 +98,7 @@ void nlm_early_init_secondary(int cpu)
change_c0_config(CONF_CM_CMASK, 0x3);
write_c0_ebase((uint32_t)nlm_common_ebase);
#ifdef CONFIG_CPU_XLP
- if (hard_smp_processor_id() % 4 == 0)
+ if (cpu % 4 == 0)
xlp_mmu_init();
#endif
}
diff --git a/arch/mips/netlogic/common/smpboot.S b/arch/mips/netlogic/common/smpboot.S
index 25c1825..a0b7487 100644
--- a/arch/mips/netlogic/common/smpboot.S
+++ b/arch/mips/netlogic/common/smpboot.S
@@ -186,7 +186,7 @@ EXPORT(nlm_boot_siblings)
* jump to the secondary wait function.
*/
mfc0 v0, CP0_EBASE, 1
- andi v0, 0x7f /* v0 <- node/core */
+ andi v0, 0x3ff /* v0 <- node/core */
/* Init MMU in the first thread after changing THREAD_MODE
* register (Ax Errata?)
@@ -263,6 +263,8 @@ NESTED(nlm_boot_secondary_cpus, 16, sp)
PTR_L gp, 0(t1)
/* a0 has the processor id */
+ mfc0 a0, CP0_EBASE, 1
+ andi a0, 0x3ff /* a0 <- node/core */
PTR_LA t0, nlm_early_init_secondary
jalr t0
nop
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