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author | John Crispin <blogic@openwrt.org> | 2012-11-09 13:31:51 +0100 |
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committer | John Crispin <blogic@openwrt.org> | 2012-11-11 18:47:20 +0100 |
commit | 15753b6586710d788f36cfd5fbb98d0805b390ab (patch) | |
tree | a05849e034a7acee5a5b04766933fdbb179fd98e /arch/mips | |
parent | a15d129a352e5f6ab821b81bc3f692ecc952a815 (diff) | |
download | op-kernel-dev-15753b6586710d788f36cfd5fbb98d0805b390ab.zip op-kernel-dev-15753b6586710d788f36cfd5fbb98d0805b390ab.tar.gz |
MIPS: lantiq: fix bootselect bits on XRX200 SoC
The XRX200 SoC family has a different register layout for reading the boot
selection bits.
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4519
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/lantiq/xway/reset.c | 22 |
1 files changed, 15 insertions, 7 deletions
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c index 22c55f7..2799212 100644 --- a/arch/mips/lantiq/xway/reset.c +++ b/arch/mips/lantiq/xway/reset.c @@ -34,11 +34,12 @@ /* reset cause */ #define RCU_STAT_SHIFT 26 /* boot selection */ -#define RCU_BOOT_SEL_SHIFT 26 -#define RCU_BOOT_SEL_MASK 0x7 +#define RCU_BOOT_SEL(x) ((x >> 18) & 0x7) +#define RCU_BOOT_SEL_XRX200(x) (((x >> 17) & 0xf) | ((x >> 8) & 0x10)) /* remapped base addr of the reset control unit */ static void __iomem *ltq_rcu_membase; +static struct device_node *ltq_rcu_np; /* This function is used by the watchdog driver */ int ltq_reset_cause(void) @@ -52,7 +53,11 @@ EXPORT_SYMBOL_GPL(ltq_reset_cause); unsigned char ltq_boot_select(void) { u32 val = ltq_rcu_r32(RCU_RST_STAT); - return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK; + + if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) + return RCU_BOOT_SEL_XRX200(val); + + return RCU_BOOT_SEL(val); } /* reset a io domain for u micro seconds */ @@ -85,14 +90,17 @@ static void ltq_machine_power_off(void) static int __init mips_reboot_setup(void) { struct resource res; - struct device_node *np = - of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway"); + + ltq_rcu_np = of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway"); + if (!ltq_rcu_np) + ltq_rcu_np = of_find_compatible_node(NULL, NULL, + "lantiq,rcu-xrx200"); /* check if all the reset register range is available */ - if (!np) + if (!ltq_rcu_np) panic("Failed to load reset resources from devicetree"); - if (of_address_to_resource(np, 0, &res)) + if (of_address_to_resource(ltq_rcu_np, 0, &res)) panic("Failed to get rcu memory range"); if (request_mem_region(res.start, resource_size(&res), res.name) < 0) |