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| author | Ido Shamay <idos@mellanox.com> | 2014-12-16 13:28:54 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-12-16 15:23:53 -0500 |
| commit | c3f2511feac088030055012cc8f64ebd84c87dbc (patch) | |
| tree | d0050aaf6f9f5a2571abd772115ff7cd10ccbfb6 /arch/mips | |
| parent | 94191fd6718c6ae000afdad2ade5c473d1439c57 (diff) | |
| download | op-kernel-dev-c3f2511feac088030055012cc8f64ebd84c87dbc.zip op-kernel-dev-c3f2511feac088030055012cc8f64ebd84c87dbc.tar.gz | |
net/mlx4: Cache line CQE/EQE stride fixes
This commit contains 2 fixes for the 128B CQE/EQE stride feaure.
Wei found that mlx4_QUERY_HCA function marked the wrong capability
in flags (64B CQE/EQE), when CQE/EQE stride feature was enabled.
Also added small fix in initial CQE ownership bit assignment, when CQE
is size is not default 32B.
Fixes: 77507aa24 (net/mlx4: Enable CQE/EQE stride support)
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Ido Shamay <idos@mellanox.com>
Signed-off-by: Amir Vadai <amirv@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions
