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| author | Chandrakala Chavva <cchavva@caviumnetworks.com> | 2015-03-06 14:02:21 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-03-25 13:47:59 +0100 |
| commit | 9a49899eb88803dcc0ef437f09912f9a7b7a66fd (patch) | |
| tree | d47cd172cec40c44ab3ef6346a79c5368e181e35 /arch/mips | |
| parent | a8667d706dfa394ef9fe5f9013dee92d40a096e8 (diff) | |
| download | op-kernel-dev-9a49899eb88803dcc0ef437f09912f9a7b7a66fd.zip op-kernel-dev-9a49899eb88803dcc0ef437f09912f9a7b7a66fd.tar.gz | |
MIPS: OCTEON: Use correct CSR to soft reset
Also delete unused cvmx_reset_octeon()
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/9471/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/cavium-octeon/setup.c | 5 | ||||
| -rw-r--r-- | arch/mips/include/asm/octeon/cvmx.h | 8 |
2 files changed, 4 insertions, 9 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index a42110e..a7f4082 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -413,7 +413,10 @@ static void octeon_restart(char *command) mb(); while (1) - cvmx_write_csr(CVMX_CIU_SOFT_RST, 1); + if (OCTEON_IS_OCTEON3()) + cvmx_write_csr(CVMX_RST_SOFT_RST, 1); + else + cvmx_write_csr(CVMX_CIU_SOFT_RST, 1); } diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h index 33db1c8..774bb45 100644 --- a/arch/mips/include/asm/octeon/cvmx.h +++ b/arch/mips/include/asm/octeon/cvmx.h @@ -436,14 +436,6 @@ static inline uint64_t cvmx_get_cycle_global(void) /***************************************************************************/ -static inline void cvmx_reset_octeon(void) -{ - union cvmx_ciu_soft_rst ciu_soft_rst; - ciu_soft_rst.u64 = 0; - ciu_soft_rst.s.soft_rst = 1; - cvmx_write_csr(CVMX_CIU_SOFT_RST, ciu_soft_rst.u64); -} - /* Return the number of cores available in the chip */ static inline uint32_t cvmx_octeon_num_cores(void) { |
