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authorRalf Baechle <ralf@linux-mips.org>2005-11-15 13:11:35 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-11-17 16:23:55 +0000
commit3d5d44017601c927f5e14c43b0efee34e7e50a66 (patch)
tree372b4d998b82368e172c4355f6973c609ff7cff0 /arch/mips
parentc183f1224bbae052b5fbb971d6eafc5cbdc6be4f (diff)
downloadop-kernel-dev-3d5d44017601c927f5e14c43b0efee34e7e50a66.zip
op-kernel-dev-3d5d44017601c927f5e14c43b0efee34e7e50a66.tar.gz
[MIPS] Ocelot G: Use CPU_MASK_NONE instead of 0 to initialize cpu mask.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/momentum/ocelot_g/gt-irq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c
index d0b5c9d..e5eceed 100644
--- a/arch/mips/momentum/ocelot_g/gt-irq.c
+++ b/arch/mips/momentum/ocelot_g/gt-irq.c
@@ -178,7 +178,7 @@ void gt64240_time_init(void)
timer.name = "timer";
timer.dev_id = NULL;
timer.next = NULL;
- timer.mask = 0;
+ timer.mask = CPU_MASK_NONE;
irq_desc[6].action = &timer;
enable_irq(6);
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