diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2009-04-02 14:07:10 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-05-14 13:50:27 +0100 |
commit | c52399bece85cd4b157dd772e9f20551f9f18d2f (patch) | |
tree | 1f503f581735e0f4e08bb9bd2a128a89396d7828 /arch/mips | |
parent | 740ebe4a54fae1705705ec87ce511b16ffb50659 (diff) | |
download | op-kernel-dev-c52399bece85cd4b157dd772e9f20551f9f18d2f.zip op-kernel-dev-c52399bece85cd4b157dd772e9f20551f9f18d2f.tar.gz |
MIPS: Cavium: Add support for 8k and 32k page sizes.
Beyond the requirements of the architecture standard Cavium also supports
8k and 32k pages.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 16 | ||||
-rw-r--r-- | arch/mips/include/asm/mipsregs.h | 11 | ||||
-rw-r--r-- | arch/mips/include/asm/page.h | 3 | ||||
-rw-r--r-- | arch/mips/include/asm/pgtable-64.h | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/thread_info.h | 3 | ||||
-rw-r--r-- | arch/mips/lib/dump_tlb.c | 9 |
6 files changed, 44 insertions, 4 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 998e5db..023aa2d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1411,13 +1411,12 @@ config PAGE_SIZE_4KB config PAGE_SIZE_8KB bool "8kB" - depends on EXPERIMENTAL && CPU_R8000 + depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON help Using 8kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available - only on the R8000 processor. Not that at the time of this writing - this option is still high experimental; there are also issues with - compatibility of user applications. + only on R8000 and cnMIPS processors. Note that you will need a + suitable Linux distribution to support this. config PAGE_SIZE_16KB bool "16kB" @@ -1428,6 +1427,15 @@ config PAGE_SIZE_16KB all non-R3000 family processors. Note that you will need a suitable Linux distribution to support this. +config PAGE_SIZE_32KB + bool "32kB" + depends on CPU_CAVIUM_OCTEON + help + Using 32kB page size will result in higher performance kernel at + the price of higher memory consumption. This option is available + only on cnMIPS cores. Note that you will need a suitable Linux + distribution to support this. + config PAGE_SIZE_64KB bool "64kB" depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 1f79877..0ef30c8 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -184,12 +184,19 @@ #else #define PM_4K 0x00000000 +#define PM_8K 0x00002000 #define PM_16K 0x00006000 +#define PM_32K 0x0000e000 #define PM_64K 0x0001e000 +#define PM_128K 0x0003e000 #define PM_256K 0x0007e000 +#define PM_512K 0x000fe000 #define PM_1M 0x001fe000 +#define PM_2M 0x003fe000 #define PM_4M 0x007fe000 +#define PM_8M 0x00ffe000 #define PM_16M 0x01ffe000 +#define PM_32M 0x03ffe000 #define PM_64M 0x07ffe000 #define PM_256M 0x1fffe000 #define PM_1G 0x7fffe000 @@ -201,8 +208,12 @@ */ #ifdef CONFIG_PAGE_SIZE_4KB #define PM_DEFAULT_MASK PM_4K +#elif defined(CONFIG_PAGE_SIZE_8KB) +#define PM_DEFAULT_MASK PM_8K #elif defined(CONFIG_PAGE_SIZE_16KB) #define PM_DEFAULT_MASK PM_16K +#elif defined(CONFIG_PAGE_SIZE_32KB) +#define PM_DEFAULT_MASK PM_32K #elif defined(CONFIG_PAGE_SIZE_64KB) #define PM_DEFAULT_MASK PM_64K #else diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index fe7a88e..9f946e4 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h @@ -23,6 +23,9 @@ #ifdef CONFIG_PAGE_SIZE_16KB #define PAGE_SHIFT 14 #endif +#ifdef CONFIG_PAGE_SIZE_32KB +#define PAGE_SHIFT 15 +#endif #ifdef CONFIG_PAGE_SIZE_64KB #define PAGE_SHIFT 16 #endif diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h index 943515f..4ed9d1b 100644 --- a/arch/mips/include/asm/pgtable-64.h +++ b/arch/mips/include/asm/pgtable-64.h @@ -83,6 +83,12 @@ #define PMD_ORDER 0 #define PTE_ORDER 0 #endif +#ifdef CONFIG_PAGE_SIZE_32KB +#define PGD_ORDER 0 +#define PUD_ORDER aieeee_attempt_to_allocate_pud +#define PMD_ORDER 0 +#define PTE_ORDER 0 +#endif #ifdef CONFIG_PAGE_SIZE_64KB #define PGD_ORDER 0 #define PUD_ORDER aieeee_attempt_to_allocate_pud diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index 676aa2a..143a481 100644 --- a/arch/mips/include/asm/thread_info.h +++ b/arch/mips/include/asm/thread_info.h @@ -75,6 +75,9 @@ register struct thread_info *__current_thread_info __asm__("$28"); #ifdef CONFIG_PAGE_SIZE_16KB #define THREAD_SIZE_ORDER (0) #endif +#ifdef CONFIG_PAGE_SIZE_32KB +#define THREAD_SIZE_ORDER (0) +#endif #ifdef CONFIG_PAGE_SIZE_64KB #define THREAD_SIZE_ORDER (0) #endif diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 779821c..3f69725 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -19,6 +19,15 @@ static inline const char *msk2str(unsigned int mask) case PM_16K: return "16kb"; case PM_64K: return "64kb"; case PM_256K: return "256kb"; +#ifdef CONFIG_CPU_CAVIUM_OCTEON + case PM_8K: return "8kb"; + case PM_32K: return "32kb"; + case PM_128K: return "128kb"; + case PM_512K: return "512kb"; + case PM_2M: return "2Mb"; + case PM_8M: return "8Mb"; + case PM_32M: return "32Mb"; +#endif #ifndef CONFIG_CPU_VR41XX case PM_1M: return "1Mb"; case PM_4M: return "4Mb"; |