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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2018-05-14 22:04:59 +0200
committerJames Hogan <jhogan@kernel.org>2018-05-14 23:58:23 +0100
commit8798e3921e3000a046d336920588745b6651959b (patch)
tree2ba078f9eadb3ad4e0b417afa04acbf5a7ddac5c /arch/mips
parent49b031690abe1eb135a685c75fe78e9591f8818b (diff)
downloadop-kernel-dev-8798e3921e3000a046d336920588745b6651959b.zip
op-kernel-dev-8798e3921e3000a046d336920588745b6651959b.tar.gz
MIPS: mscc: Connect phys to ports on ocelot_pcb123
Add phy to switch port connections for PCB123 for internal PHYs. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: David S. Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Signed-off-by: James Hogan <jhogan@kernel.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/boot/dts/mscc/ocelot_pcb123.dts20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
index 29d6414..4ccd653 100644
--- a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
+++ b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
@@ -25,3 +25,23 @@
&uart2 {
status = "okay";
};
+
+&mdio0 {
+ status = "okay";
+};
+
+&port0 {
+ phy-handle = <&phy0>;
+};
+
+&port1 {
+ phy-handle = <&phy1>;
+};
+
+&port2 {
+ phy-handle = <&phy2>;
+};
+
+&port3 {
+ phy-handle = <&phy3>;
+};
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