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author | Thomas Gleixner <tglx@linutronix.de> | 2014-02-23 21:40:14 +0000 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2014-03-04 17:37:53 +0100 |
commit | 310ff2c87e72208e4f04f33687abe9d208ffefe3 (patch) | |
tree | d4ab6b1f906f40bec55bebea76c4e37db94ef888 /arch/mips/sibyte | |
parent | 792d0018a5fe31ef8ef9d07a7a02081d4abdf6b7 (diff) | |
download | op-kernel-dev-310ff2c87e72208e4f04f33687abe9d208ffefe3.zip op-kernel-dev-310ff2c87e72208e4f04f33687abe9d208ffefe3.tar.gz |
mips: Use the core irq stats function
Let the core do the irq_desc resolution.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: mips <inux-mips@linux-mips.org>
Link: http://lkml.kernel.org/r/20140223212737.517340416@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r-- | arch/mips/sibyte/bcm1480/smp.c | 2 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/smp.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c index 54e2c4d..70d9182 100644 --- a/arch/mips/sibyte/bcm1480/smp.c +++ b/arch/mips/sibyte/bcm1480/smp.c @@ -182,7 +182,7 @@ void bcm1480_mailbox_interrupt(void) int irq = K_BCM1480_INT_MBOX_0_0; unsigned int action; - kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq)); + kstat_incr_irq_this_cpu(irq); /* Load the mailbox register to figure out what we're supposed to do */ action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff; diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c index d7b942d..db97611 100644 --- a/arch/mips/sibyte/sb1250/smp.c +++ b/arch/mips/sibyte/sb1250/smp.c @@ -170,7 +170,7 @@ void sb1250_mailbox_interrupt(void) int irq = K_INT_MBOX_0; unsigned int action; - kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq)); + kstat_incr_irq_this_cpu(irq); /* Load the mailbox register to figure out what we're supposed to do */ action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff; |