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authorJayachandran C <jchandra@broadcom.com>2013-12-21 16:52:26 +0530
committerRalf Baechle <ralf@linux-mips.org>2014-01-24 22:39:49 +0100
commit98d4884ca55883e8b16180bd969a8bccaa885c80 (patch)
treeca7424268b4ef49d1472895bf2bb50d57b38d4fe /arch/mips/pci
parente7aa6c66b0acc34caba3af485f1a039bfa8aef07 (diff)
downloadop-kernel-dev-98d4884ca55883e8b16180bd969a8bccaa885c80.zip
op-kernel-dev-98d4884ca55883e8b16180bd969a8bccaa885c80.tar.gz
MIPS: Netlogic: Add cpu to node mapping for XLP9XX
XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX. Update code that calculates node id from cpu id to handle this. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6283/
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/msi-xlp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index 66a244a..afd8405 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -280,7 +280,7 @@ static int xlp_setup_msi(uint64_t lnkbase, int node, int link,
irt = PIC_IRT_PCIE_LINK_INDEX(link);
nlm_setup_pic_irq(node, lirq, lirq, irt);
nlm_pic_init_irt(nlm_get_node(node)->picbase, irt, lirq,
- node * NLM_CPUS_PER_NODE, 1 /*en */);
+ node * nlm_threads_per_node(), 1 /*en */);
}
/* allocate a MSI vec, and tell the bridge about it */
@@ -443,7 +443,7 @@ void __init xlp_init_node_msi_irqs(int node, int link)
msixvec = link * XLP_MSIXVEC_PER_LINK + i;
irt = PIC_IRT_PCIE_MSIX_INDEX(msixvec);
nlm_pic_init_irt(nodep->picbase, irt, PIC_PCIE_MSIX_IRQ(link),
- node * NLM_CPUS_PER_NODE, 1 /* enable */);
+ node * nlm_threads_per_node(), 1 /* enable */);
/* Initialize MSI-X extended irq space for the link */
irq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, i));
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