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authorJohn Crispin <blogic@openwrt.org>2011-03-30 09:27:49 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-05-19 09:55:42 +0100
commite47d488935ed0b2dd3d59d3ba4e13956ff6849c0 (patch)
treed6cdd24c6fa6d5cf4b5c461a8cc031cf9f3f1014 /arch/mips/pci/pci-lantiq.h
parent8ec6d93508f705dacafd5fcd058c69ef405002f9 (diff)
downloadop-kernel-dev-e47d488935ed0b2dd3d59d3ba4e13956ff6849c0.zip
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MIPS: Lantiq: Add PCI controller support.
The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work. The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-lantiq.h')
-rw-r--r--arch/mips/pci/pci-lantiq.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/mips/pci/pci-lantiq.h b/arch/mips/pci/pci-lantiq.h
new file mode 100644
index 0000000..66bf6cd
--- /dev/null
+++ b/arch/mips/pci/pci-lantiq.h
@@ -0,0 +1,18 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
+ */
+
+#ifndef _LTQ_PCI_H__
+#define _LTQ_PCI_H__
+
+extern __iomem void *ltq_pci_mapped_cfg;
+extern int ltq_pci_read_config_dword(struct pci_bus *bus,
+ unsigned int devfn, int where, int size, u32 *val);
+extern int ltq_pci_write_config_dword(struct pci_bus *bus,
+ unsigned int devfn, int where, int size, u32 val);
+
+#endif
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