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author | Steven J. Hill <Steven.Hill@imgtec.com> | 2013-06-13 19:55:04 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2013-06-21 18:07:01 +0200 |
commit | 2ddbc4e2f9729ce62f9286868eab6f1523f00d67 (patch) | |
tree | 3128da8562defe040384746fab6a162458822bd8 /arch/mips/mti-sead3/sead3-reset.c | |
parent | 2f963bfbd84207776725db82287b73cfeeab8a92 (diff) | |
download | op-kernel-dev-2ddbc4e2f9729ce62f9286868eab6f1523f00d67.zip op-kernel-dev-2ddbc4e2f9729ce62f9286868eab6f1523f00d67.tar.gz |
MIPS: sead3: Fix ability to perform a soft reset.
The soft reset register address and reset value to be written are
incorrect for the SEAD-3 platform. This patch fixes them such that
the SEAD-3 can actually perform a soft reset instead of causing an
exception. Also remove usage of 'include/asm/mips-boards/generic.h'
header file.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5454/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-sead3/sead3-reset.c')
-rw-r--r-- | arch/mips/mti-sead3/sead3-reset.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/mti-sead3/sead3-reset.c b/arch/mips/mti-sead3/sead3-reset.c index 20475c5..e6fb244 100644 --- a/arch/mips/mti-sead3/sead3-reset.c +++ b/arch/mips/mti-sead3/sead3-reset.c @@ -9,7 +9,9 @@ #include <linux/pm.h> #include <asm/reboot.h> -#include <asm/mips-boards/generic.h> + +#define SOFTRES_REG 0x1f000050 +#define GORESET 0x4d static void mips_machine_restart(char *command) { @@ -35,5 +37,4 @@ static int __init mips_reboot_setup(void) return 0; } - arch_initcall(mips_reboot_setup); |