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authorMarkos Chandras <markos.chandras@imgtec.com>2014-05-21 12:35:00 +0100
committerRalf Baechle <ralf@linux-mips.org>2014-05-25 12:45:06 +0200
commit721a9205396c4ef2a811dd665ec2a232163b583d (patch)
treebc17dc3d893de377ed94f605a082ef7bf8773d6d /arch/mips/mti-malta
parentdefb79f08630f4d1944c75ad0070026d0f534fda (diff)
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op-kernel-dev-721a9205396c4ef2a811dd665ec2a232163b583d.tar.gz
MIPS: Fix typo when reporting cache and ftlb errors for ImgTec cores
Introduced by the following two commits: 75b5b5e0a262790fa11043fe45700499c7e3d818 "MIPS: Add support for FTLBs" 6de20451857ed14a4eecc28d08f6de5925d1cf96 "MIPS: Add printing of ES bit for Imgtec cores when cache error occurs" Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Reported-by: Matheus Almeida <Matheus.Almeida@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: stable@vger.kernel.org # v3.14+ Patchwork: https://patchwork.linux-mips.org/patch/6980/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-malta')
0 files changed, 0 insertions, 0 deletions
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