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| author | David Daney <david.daney@cavium.com> | 2012-05-15 00:04:48 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-16 23:34:33 +0200 |
| commit | 586016ebf76d62e58a0e9dfd971e465c8027889d (patch) | |
| tree | a83319dd56a2d445db20be61a6df0c01fc3cb1bc /arch/mips/mm | |
| parent | e3dc81f2306e650f01e38ec87e24c3fecb843dc3 (diff) | |
| download | op-kernel-dev-586016ebf76d62e58a0e9dfd971e465c8027889d.zip op-kernel-dev-586016ebf76d62e58a0e9dfd971e465c8027889d.tar.gz | |
MIPS: Octeon: Use board_cache_error_setup for cache error handler setup.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3820/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/c-octeon.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index 47037ec..44e69e7 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -21,6 +21,7 @@ #include <asm/page.h> #include <asm/pgtable.h> #include <asm/r4kcache.h> +#include <asm/traps.h> #include <asm/mmu_context.h> #include <asm/war.h> @@ -248,6 +249,11 @@ static void __cpuinit probe_octeon(void) } } +static void __cpuinit octeon_cache_error_setup(void) +{ + extern char except_vec2_octeon; + set_handler(0x100, &except_vec2_octeon, 0x80); +} /** * Setup the Octeon cache flush routines @@ -255,12 +261,6 @@ static void __cpuinit probe_octeon(void) */ void __cpuinit octeon_cache_init(void) { - extern unsigned long ebase; - extern char except_vec2_octeon; - - memcpy((void *)(ebase + 0x100), &except_vec2_octeon, 0x80); - octeon_flush_cache_sigtramp(ebase + 0x100); - probe_octeon(); shm_align_mask = PAGE_SIZE - 1; @@ -280,6 +280,8 @@ void __cpuinit octeon_cache_init(void) build_clear_page(); build_copy_page(); + + board_cache_error_setup = octeon_cache_error_setup; } /** |
