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authorKevin Cernekee <cernekee@gmail.com>2009-09-18 19:12:45 -0700
committerRalf Baechle <ralf@linux-mips.org>2009-09-30 21:47:00 +0200
commit96983ffefce46312e9372d357309dda413553009 (patch)
treeda15ecb8a3c728af409fa0903f292731c358e222 /arch/mips/mm/tlbex.c
parenta648e8119666782f21b509a7886be9b281e41ccb (diff)
downloadop-kernel-dev-96983ffefce46312e9372d357309dda413553009.zip
op-kernel-dev-96983ffefce46312e9372d357309dda413553009.tar.gz
MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.
This extends commit a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d to cover MIPSxx-style board cache code. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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