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| author | David Woodhouse <dwmw2@infradead.org> | 2007-10-13 14:43:54 +0100 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2007-10-13 14:43:54 +0100 |
| commit | b160292cc216a50fd0cd386b0bda2cd48352c73b (patch) | |
| tree | ef07cf98f91353ee4c9ec1e1ca7a2a5d9d4b538a /arch/mips/mips-boards/malta/malta_smtc.c | |
| parent | b37bde147890c8fea8369a5a4e230dabdea4ebfb (diff) | |
| parent | bbf25010f1a6b761914430f5fca081ec8c7accd1 (diff) | |
| download | op-kernel-dev-b160292cc216a50fd0cd386b0bda2cd48352c73b.zip op-kernel-dev-b160292cc216a50fd0cd386b0bda2cd48352c73b.tar.gz | |
Merge Linux 2.6.23
Diffstat (limited to 'arch/mips/mips-boards/malta/malta_smtc.c')
| -rw-r--r-- | arch/mips/mips-boards/malta/malta_smtc.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c index 0fb4c26..ae05d05 100644 --- a/arch/mips/mips-boards/malta/malta_smtc.c +++ b/arch/mips/mips-boards/malta/malta_smtc.c @@ -1,6 +1,7 @@ /* * Malta Platform-specific hooks for SMP operation */ +#include <linux/irq.h> #include <linux/init.h> #include <asm/mipsregs.h> @@ -24,7 +25,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ -void prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { smtc_boot_secondary(cpu, idle); } @@ -33,7 +34,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { void smtc_init_secondary(void); int myvpe; @@ -42,10 +43,11 @@ void prom_init_secondary(void) myvpe = read_c0_tcbind() & TCBIND_CURVPE; if (myvpe != 0) { /* Ideally, this should be done only once per VPE, but... */ - clear_c0_status(STATUSF_IP2); - set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3 - | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 - | STATUSF_IP7); + clear_c0_status(ST0_IM); + set_c0_status((0x100 << cp0_compare_irq) + | (0x100 << MIPS_CPU_IPI_IRQ)); + if (cp0_perfcount_irq >= 0) + set_c0_status(0x100 << cp0_perfcount_irq); } smtc_init_secondary(); @@ -74,7 +76,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { smtc_smp_finish(); } |
