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authorWu Zhangjin <wuzhangjin@gmail.com>2010-07-24 09:22:13 +0800
committerRalf Baechle <ralf@linux-mips.org>2010-08-05 13:26:23 +0100
commitb8c7428af023c4cc37b8651e309713c1f4d9a18e (patch)
treeb3ed6ba799a19e545696759722b0722072202506 /arch/mips/loongson
parent4c076fb41ac93bc0cbd55f2a731cc31337804acb (diff)
downloadop-kernel-dev-b8c7428af023c4cc37b8651e309713c1f4d9a18e.zip
op-kernel-dev-b8c7428af023c4cc37b8651e309713c1f4d9a18e.tar.gz
MIPS: Loongson: Remove set_irq_trigger_mode()
set_irq_trigger_mode() is not needed on all platforms so remove it and move the related source code to mach_init_irq(). This will allow gdium to share the common irq.c without adding an empty set_irq_trigger_mode(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson')
-rw-r--r--arch/mips/loongson/common/irq.c3
-rw-r--r--arch/mips/loongson/fuloong-2e/irq.c11
-rw-r--r--arch/mips/loongson/lemote-2f/irq.c11
3 files changed, 8 insertions, 17 deletions
diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c
index 25a11df..5897471 100644
--- a/arch/mips/loongson/common/irq.c
+++ b/arch/mips/loongson/common/irq.c
@@ -53,9 +53,6 @@ void __init arch_init_irq(void)
*/
clear_c0_status(ST0_IM | ST0_BEV);
- /* setting irq trigger mode */
- set_irq_trigger_mode();
-
/* no steer */
LOONGSON_INTSTEER = 0;
diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson/fuloong-2e/irq.c
index 320e937..99e08c3 100644
--- a/arch/mips/loongson/fuloong-2e/irq.c
+++ b/arch/mips/loongson/fuloong-2e/irq.c
@@ -44,13 +44,6 @@ static struct irqaction cascade_irqaction = {
.name = "cascade",
};
-void __init set_irq_trigger_mode(void)
-{
- /* most bonito irq should be level triggered */
- LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
- LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
-}
-
void __init mach_init_irq(void)
{
/* init all controller
@@ -59,6 +52,10 @@ void __init mach_init_irq(void)
* 32-63 ------> bonito irq
*/
+ /* most bonito irq should be level triggered */
+ LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
+ LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
+
/* Sets the first-level interrupt dispatcher. */
mips_cpu_irq_init();
init_i8259_irqs();
diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c
index 1d8b4d2..c6db7e7 100644
--- a/arch/mips/loongson/lemote-2f/irq.c
+++ b/arch/mips/loongson/lemote-2f/irq.c
@@ -91,13 +91,6 @@ void mach_irq_dispatch(unsigned int pending)
spurious_interrupt();
}
-void __init set_irq_trigger_mode(void)
-{
- /* setup cs5536 as high level trigger */
- LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
- LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
-}
-
static irqreturn_t ip6_action(int cpl, void *dev_id)
{
return IRQ_HANDLED;
@@ -122,6 +115,10 @@ void __init mach_init_irq(void)
* 32-63 ------> bonito irq
*/
+ /* setup cs5536 as high level trigger */
+ LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
+ LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
+
/* Sets the first-level interrupt dispatcher. */
mips_cpu_irq_init();
init_i8259_irqs();
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