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author | Kelvin Cheung <keguang.zhang@gmail.com> | 2012-10-23 05:17:03 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2012-11-09 11:37:20 +0100 |
commit | 69b1803ab79ebda75df2bfcb1c2a54d6c3de5325 (patch) | |
tree | a95ba50a105f7d354c9fe9ccf034f779dfdf2910 /arch/mips/loongson1/common | |
parent | 94fd4bdf4d7a1e501cbfb0f9e3218143cf5c20d0 (diff) | |
download | op-kernel-dev-69b1803ab79ebda75df2bfcb1c2a54d6c3de5325.zip op-kernel-dev-69b1803ab79ebda75df2bfcb1c2a54d6c3de5325.tar.gz |
MIPS: Loongson1B: Fix a typo
Fix a typo in the code.
Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4434
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/loongson1/common')
-rw-r--r-- | arch/mips/loongson1/common/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/loongson1/common/clock.c b/arch/mips/loongson1/common/clock.c index 7db0a6a..07133de 100644 --- a/arch/mips/loongson1/common/clock.c +++ b/arch/mips/loongson1/common/clock.c @@ -22,7 +22,7 @@ void __init plat_time_init(void) /* setup mips r4k timer */ clk = clk_get(NULL, "cpu"); if (IS_ERR(clk)) - panic("unable to get dc clock, err=%ld", PTR_ERR(clk)); + panic("unable to get cpu clock, err=%ld", PTR_ERR(clk)); mips_hpt_frequency = clk_get_rate(clk) / 2; } |