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author | David Daney <ddaney@caviumnetworks.com> | 2010-01-22 14:41:15 -0800 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:13 +0100 |
commit | 1b362e3e350f72c6cb4b3346f6ba92a529082a09 (patch) | |
tree | de172b4853b1aaa6684e5b7afed679c88d8ab655 /arch/mips/kernel | |
parent | 2a880986d899f556f5a327bc77cc8760d5bb9c64 (diff) | |
download | op-kernel-dev-1b362e3e350f72c6cb4b3346f6ba92a529082a09.zip op-kernel-dev-1b362e3e350f72c6cb4b3346f6ba92a529082a09.tar.gz |
MIPS: Decode c0_config4 for large TLBs.
For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 758ad42..3233950 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -700,6 +700,19 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) return config3 & MIPS_CONF_M; } +static inline unsigned int decode_config4(struct cpuinfo_mips *c) +{ + unsigned int config4; + + config4 = read_c0_config4(); + + if ((config4 & MIPS_CONF4_MMUEXTDEF) == MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT + && cpu_has_tlb) + c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40; + + return config4 & MIPS_CONF_M; +} + static void __cpuinit decode_configs(struct cpuinfo_mips *c) { int ok; @@ -718,6 +731,8 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c) ok = decode_config2(c); if (ok) ok = decode_config3(c); + if (ok) + ok = decode_config4(c); mips_probe_watch_registers(c); } |