diff options
| author | Steven J. Hill <Steven.Hill@imgtec.com> | 2014-01-17 15:03:50 -0600 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-06 21:25:21 +0100 |
| commit | 442e14a2c55e55f208bf87e3686396b4ff17ebf6 (patch) | |
| tree | 9370c3907bb6b07027a95181d2e5ee3961641ec3 /arch/mips/kernel | |
| parent | 02dc6bfb080e8205aacea5c4b4dd6a9bd4c9406e (diff) | |
| download | op-kernel-dev-442e14a2c55e55f208bf87e3686396b4ff17ebf6.zip op-kernel-dev-442e14a2c55e55f208bf87e3686396b4ff17ebf6.tar.gz | |
MIPS: Add 1074K CPU support explicitly.
The 1074K is a multiprocessing coherent processing system (CPS) based
on modified 74K cores. This patch makes the 1074K an actual unique
CPU type, instead of a 74K derivative, which it is not.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6389/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/idle.c | 1 | ||||
| -rw-r--r-- | arch/mips/kernel/perf_event_mipsxx.c | 6 | ||||
| -rw-r--r-- | arch/mips/kernel/spram.c | 1 | ||||
| -rw-r--r-- | arch/mips/kernel/traps.c | 1 |
5 files changed, 10 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 530f832..ac09248 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -806,7 +806,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) __cpu_name[cpu] = "MIPS 1004Kc"; break; case PRID_IMP_1074K: - c->cputype = CPU_74K; + c->cputype = CPU_1074K; __cpu_name[cpu] = "MIPS 1074Kc"; break; case PRID_IMP_INTERAPTIV_UP: diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c index 3553243..c1fd0bc 100644 --- a/arch/mips/kernel/idle.c +++ b/arch/mips/kernel/idle.c @@ -184,6 +184,7 @@ void __init check_wait(void) case CPU_24K: case CPU_34K: case CPU_1004K: + case CPU_1074K: case CPU_INTERAPTIV: case CPU_PROAPTIV: cpu_wait = r4k_wait; diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index 24cdf64..17594b8 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -1442,6 +1442,7 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) #endif break; case CPU_74K: + case CPU_1074K: if (IS_BOTH_COUNTERS_74K_EVENT(base_id)) raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; else @@ -1584,6 +1585,11 @@ init_hw_perf_events(void) mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu.cache_event_map = &mipsxxcore_cache_map; break; + case CPU_1074K: + mipspmu.name = "mips/1074K"; + mipspmu.general_event_map = &mipsxxcore_event_map; + mipspmu.cache_event_map = &mipsxxcore_cache_map; + break; case CPU_LOONGSON1: mipspmu.name = "mips/loongson1"; mipspmu.general_event_map = &mipsxxcore_event_map; diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c index b242e2c..707d957 100644 --- a/arch/mips/kernel/spram.c +++ b/arch/mips/kernel/spram.c @@ -205,6 +205,7 @@ void spram_config(void) case CPU_34K: case CPU_74K: case CPU_1004K: + case CPU_1074K: case CPU_INTERAPTIV: case CPU_PROAPTIV: config0 = read_c0_config(); diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index e0b4996..b0c7f80 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1337,6 +1337,7 @@ static inline void parity_protection_init(void) case CPU_34K: case CPU_74K: case CPU_1004K: + case CPU_1074K: case CPU_INTERAPTIV: case CPU_PROAPTIV: { |
