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authorAl Viro <viro@zeniv.linux.org.uk>2016-05-11 00:00:29 -0400
committerAl Viro <viro@zeniv.linux.org.uk>2016-05-11 00:00:29 -0400
commite4d35be584be88a3db3fa5635a97c62a2ec5aafe (patch)
treefc22a7fb65697306edd71411959ccee6df60c64d /arch/mips/kernel/perf_event_mipsxx.c
parent99d825822eade8d827a1817357cbf3f889a552d6 (diff)
parent38b78a5f18584db6fa7441e0f4531b283b0e6725 (diff)
downloadop-kernel-dev-e4d35be584be88a3db3fa5635a97c62a2ec5aafe.zip
op-kernel-dev-e4d35be584be88a3db3fa5635a97c62a2ec5aafe.tar.gz
Merge branch 'ovl-fixes' into for-linus
Diffstat (limited to 'arch/mips/kernel/perf_event_mipsxx.c')
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index d7b8dd4..9bc1191 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -530,7 +530,7 @@ static void mipspmu_enable(struct pmu *pmu)
/*
* MIPS performance counters can be per-TC. The control registers can
- * not be directly accessed accross CPUs. Hence if we want to do global
+ * not be directly accessed across CPUs. Hence if we want to do global
* control, we need cross CPU calls. on_each_cpu() can help us, but we
* can not make sure this function is called with interrupts enabled. So
* here we pause local counters and then grab a rwlock and leave the
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