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| author | Steven J. Hill <Steven.Hill@imgtec.com> | 2014-01-17 15:03:50 -0600 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-06 21:25:21 +0100 |
| commit | 442e14a2c55e55f208bf87e3686396b4ff17ebf6 (patch) | |
| tree | 9370c3907bb6b07027a95181d2e5ee3961641ec3 /arch/mips/kernel/perf_event_mipsxx.c | |
| parent | 02dc6bfb080e8205aacea5c4b4dd6a9bd4c9406e (diff) | |
| download | op-kernel-dev-442e14a2c55e55f208bf87e3686396b4ff17ebf6.zip op-kernel-dev-442e14a2c55e55f208bf87e3686396b4ff17ebf6.tar.gz | |
MIPS: Add 1074K CPU support explicitly.
The 1074K is a multiprocessing coherent processing system (CPS) based
on modified 74K cores. This patch makes the 1074K an actual unique
CPU type, instead of a 74K derivative, which it is not.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6389/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/perf_event_mipsxx.c')
| -rw-r--r-- | arch/mips/kernel/perf_event_mipsxx.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index 24cdf64..17594b8 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -1442,6 +1442,7 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) #endif break; case CPU_74K: + case CPU_1074K: if (IS_BOTH_COUNTERS_74K_EVENT(base_id)) raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; else @@ -1584,6 +1585,11 @@ init_hw_perf_events(void) mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu.cache_event_map = &mipsxxcore_cache_map; break; + case CPU_1074K: + mipspmu.name = "mips/1074K"; + mipspmu.general_event_map = &mipsxxcore_event_map; + mipspmu.cache_event_map = &mipsxxcore_cache_map; + break; case CPU_LOONGSON1: mipspmu.name = "mips/loongson1"; mipspmu.general_event_map = &mipsxxcore_event_map; |
